Understanding Camera's Cds Mode: How It Works

Correlated double sampling (CDS) mode is a feature of the latest K3 camera, which is used for high-resolution and high-throughput single-particle cryo-EM. CDS mode offers a higher DQE and improved throughput compared to its predecessor, the Gatan K2. The K3 camera is faster and larger, and CDS mode helps to optimise camera data collection parameters for daily use within a cryo-EM facility, exploring the balance between throughput and resolution.

Correlated-double sampling (CDS) mode in cameras improves resolution and throughput

CDS is a technique used in CCD (charge-coupled device) image sensors to improve the signal-to-noise ratio of the output image. The process of reading out the CCD consists of two parts: moving charge packets (representing pixel values) around the sensor, and converting the charge packet values into output voltages. It is during this second stage that "readout noise" is often injected into the signal path.

The charge-to-voltage converter at the CCD output is essentially a capacitor with a single- or multistage voltage follower and a switch to preset the capacitor voltage to a "known" level. In simple video systems, the switch is closed at the beginning of each pixel readout, which presets the capacitor voltage and the output level. However, due to the finite residual conductivity of the switch, the capacitor is precharged to an unknown value, adding noise to the output signal.

CDS compensates for this precharge uncertainty by sampling the output signal twice for each pixel: once just after precharging the capacitor, and again after the pixel charge packet is added. The difference between these two values does not include the noise component induced by the switch, resulting in a cleaner image.

The Gatan K3 camera, for example, offers a CDS mode, which has been shown to result in a higher DQE (Detective Quantum Efficiency) and improved throughput compared to its predecessor, the Gatan K2. In one study, the K3 camera operating in CDS mode achieved better reconstruction resolutions in all tested conditions, with 8 electrons per pixel per second being the optimal dose rate.

CDS compensates for precharge uncertainty in the readout signal

Correlated double sampling (CDS) is a method used to compensate for precharge uncertainty in the readout signal of a camera. The readout process from a CCD consists of two parts: moving charge packets (representing pixel values) around the sensor, and converting the charge packet values into output voltages. It is during this second stage that "readout noise" is injected into the signal path.

The charge-to-voltage converter at the CCD output is a capacitor with a single- or multistage voltage follower and a switch to preset the capacitor voltage to a "known" level. In simple video systems, the switch is closed at the beginning of each pixel readout, which presets the capacitor voltage and the output level. After the pixel charge packet is transferred to the capacitor, its voltage changes and the output signal represents the pixel value.

The switch is the "worst" element in this process due to its finite residual conductivity. The capacitor is precharged to an unknown value, which adds to the output signal. CDS compensates for this precharge uncertainty by sampling the output signal twice for each pixel: once just after precharging the capacitor, and again after the pixel charge packet is added. The difference between these two values does not include the noise component induced by the switch.

CDS cannot compensate for all noise in the readout signal

Correlated double sampling (CDS) is a method used to compensate for "readout noise" in the signal path. This noise is introduced when converting the charge packet values (representing pixel values) into output voltages. The charge-to-voltage converter at the output of a CCD (charge-coupled device) is essentially a capacitor with a single- or multistage voltage follower and a switch to preset the capacitor voltage to a known level. The output signal is sampled twice for each pixel: once just after precharging the capacitor and again after the pixel charge packet is added. The difference between these two values does not include the noise component induced by the switch.

However, CDS cannot compensate for all noise in the readout signal. It cannot eliminate noise from the output stage, which is combined with analog circuits that process the CCD signal outside its chip. Most of this noise comes from the active component of the impedances in the signal path (resistor thermal noise) and is proportional to the square root of the bandwidth. This is why high-sensitivity scientific-grade CCD readouts are called "slow scan". The longer the pixel value is integrated during the sampling process, the lower the noise added to the signal.

Reducing the readout rate has its limitations. It increases the waiting time for charge packets to reach the output stage, during which time they are subject to thermal ("dark") current that adds to their values. While the average value of thermally generated charges can be subtracted from the output value, the random part (proportional to the square root of the number of electrons) cannot. To address this issue, slow-scan cameras are often "cooled", using Peltier or liquid nitrogen cooling to exponentially decrease the sensor's dark current. However, this adds complexity to the system.

As a result, the design of slow-scan CCD readout systems must balance two conflicting requirements: reducing noise induced at the output amplifier by slowing down the pixel readout, and minimising noise added by dark current by speeding up the chip readout. Most CDS implementations use analog circuitry for sampling and subtracting signal values, making it challenging to adjust the optimal sampling time based on factors like readout mode, windowing, binning, and sensor temperature.

Slow-scan CCD readout systems negotiate between two conflicting requirements

The design of these systems must balance these two factors. The "worst" element in the readout process is the switch, which presets the capacitor voltage to a "known" level. Due to its finite residual conductivity, the capacitor is precharged to an unknown value, which adds to the output signal. This issue can be mitigated through correlated double sampling (CDS), which samples the output signal twice for each pixel and takes the difference between the two values, thereby excluding the noise component induced by the switch.

However, even CDS cannot eliminate all noise from the CCD readout signal, especially that induced by the output stage and the analog circuits that process the CCD signal outside its chip. This noise is proportional to the square root of the bandwidth, and it is why high-sensitivity scientific-grade CCD readouts are called "slow scan". The longer the pixel value is integrated during the sampling process, the lower the noise added to the signal.

Reducing the readout rate to minimise noise has its limitations. It increases the waiting time for charge packets to reach the output stage, during which time the packets are subject to thermal ("dark") current that adds to their values. While the average value of thermally generated charges can be subtracted from the output value, the random part of it (proportional to the square root of the number of electrons) cannot.

To address this issue, slow-scan cameras are often "cooled", using Peltier or liquid nitrogen cooling to exponentially decrease the sensor's dark current. However, this adds complexity to the system.

CDS use analog circuitry for sampling and subtracting signal values

Correlated double sampling (CDS) is a technique used to reduce noise in image data from a CCD sensor. It involves sampling a waveform at two different moments, with each pair of samples being used to produce a single data point. The benefit of CDS is noise reduction, specifically the removal of noise sources that affect both the reference level and the data level of the waveform.

The process of readout from the CCD consists of two parts: moving charge packets (representing pixel values) around the sensor, and converting the charge packet values into output voltages. It is during this second stage that "readout noise" is introduced into the signal path. The charge-to-voltage converter at the CCD output is a capacitor with a single- or multistage voltage follower and a switch to preset the capacitor voltage to a "known" level. The switch is the "worst" element in this process as, due to its finite residual conductivity, the capacitor is precharged to an unknown value, which adds to the output signal. CDS compensates for this precharge uncertainty by sampling the output signal twice for each pixel: once just after precharging the capacitor, and once after the pixel charge packet is added. The difference between these two values does not include the noise component induced by the switch.

Most CDS use analog circuitry for sampling and subtracting the signal values. This makes it difficult to adjust the optimal sampling time depending on the readout mode (windowing, binning, sensor temperature, etc.). The "reset" pulse that precharges the output capacitor is not needed at each pixel. The pixel information is coded in the difference between the output value after the pixel charge was applied to the capacitor and before. When reading low-value pixels, precharging may be needed only once per hundreds of pixels. As the full-well capacity of the output capacitor is much higher than that of a pixel, it is safe to let the output signal rise to half of the saturation value before resetting it.

CDS serves two important purposes: it calculates the difference between the reference and data levels of the CCD signal, and it reduces some of the noise components in the CCD signal. By taking two samples of the CCD signal and subtracting them, any noise source that is correlated with the two samples will be removed. A slowly varying noise source that is not correlated will be reduced in magnitude.

The CDS circuit consists of two sample-and-hold (S/H) blocks and a difference amplifier. The S/H operation captures the voltage level of a signal at a specific moment in time and then maintains that value. A basic S/H solution is a capacitor with a FET that separates the capacitor from the input signal. A sample-control pulse switches on the FET and allows the capacitor to charge up to the input voltage. The CDS circuit uses one S/H block triggered at treference (during the reference-level portion of the pixel waveform), and the other triggered at tdata (during the data-level portion). The difference amplifier then subtracts the data level from the reference level and produces a single output voltage that is ready for further processing.

Frequently asked questions